CHIRON Project

Overview

CHIRON is a polyhedral model-based MLIR compiler for spatial dataflow architectures. It provides an end-to-end flow from AI models defined in PyTorch to optimized heterogeneous accelerators, while formally verifying tiled dataflow execution and automatically exploring the design space for performance.

CHIRON targets the memory wall by enabling intermediate data to be forwarded through on-chip buffers and interconnects rather than repeatedly accessing off-chip memory.

Features and Status of CHIRON

• End-to-end compilation: Supports AI models defined in PyTorch and automatically lowers them to AMD VHK158 FPGAs with HBM and VCK190 devices with AI Engines (AIEs).

• Correctness-guaranteed optimization: Integrates a polyhedral-based verifier for tiled dataflow correctness, buffer analysis, an accurate performance cost model, and automated design space exploration.

• Performance: On-board evaluation on AMD VHK158 achieves 1.93× higher GPT-2 FP32 decoding speed and 3.13× better energy efficiency than an NVIDIA A100 GPU, comparing device-side execution without host-to-device communication.

• Status: CHIRON is currently under submission.

Key Infrastructure for the Community

• Compiler Infrastructure: An open-source end-to-end automated compilation framework from PyTorch to dataflow-enabled FPGAs and AMD Versal AIE devices, designed to be extensible across heterogeneous dataflow architectures.

• Hardware Infrastructure: An open-source Vitis platform (.xpfm) for the Versal HBM series, with performance-tuned NoC connectivity and QoS supporting 32 HBM pseudo-channels and 64 HBM NMUs, providing an Alveo-like platform for HBM-based accelerator design and research.

Ongoing and Future Work

• Heterogeneous dataflow: Explore dataflow optimization across heterogeneous devices, such as using AIE-enabled devices for prefill and HBM-equipped devices for decoding.

• Multi-device compilation: Automatically partition extremely large models across multiple devices to minimize inter-device communication while guaranteeing execution correctness.