ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines(FPGA 2025 Best Paper Candidate)

Publication
Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2025, Feb. 28 - March 3, Monterey, CA, US. Full Paper Accepted! https://dl.acm.org/doi/10.1145/3706628.3708870
Jinming Zhuang
Jinming Zhuang
Ph.D. Student

My research interest lies in heterogeneous computing with FPGAs, GPUs, ASICs and NPUs, compiler design and programming abstraction, and hardware & software co-design.