ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines

Jinming Zhuang, Shaojie Xiang*, Hongzheng Chen, Niansong Zhang, Zhuoping Yang, Tony Mao, Zhiru Zhang, Peipei Zhou
January, 2025
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Type
Conference paper
Publication
Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2025 Best Paper Candidate, Feb. 28 - March 3, Monterey, CA, US. Full Paper Accepted! https://dl.acm.org/doi/10.1145/3706628.3708870
FPGA
Jinming Zhuang
Jinming Zhuang
Assistant Professor of Kate Gleason College of Engineering

My research interest lies in heterogeneous computing with FPGAs, GPUs, ASICs and NPUs, compiler design & programming abstraction, and AI hardware & software co-design.